AEC(ANALOG ELECTORNICS CIRCUIT)

Analogue electronics (American English: analog electronics) are electronic systems with a continuously variable signal, in contrast to digital electronics where signals usually take only two levels. The term “analogue” describes the proportional relationship between a signal and a voltage or current that represents the signal.

module-1

bjt and fet dc biasing

We are generally study three types of circuits in BJT DC bias circuits

1.FIXED BIAS CIRCUITS-

Image result for bjt fixed bias figures — (Fixed bias circuits)

Fixed Bias or Base Bias. In this condition a single power source is applied to the collector and base of the transistor using only two resistors. Applying KVL to the circuit, Thus, by merely changing the value of the resistor the base current can be adjusted to the desired value.

2.SELF BIAS CIRCUITS-

Image result for Transistor Emitter Bias Circuit — (Self bias circuits)

The name self bias is coined because of the fact all the DC variations around Q-point tends to adjust itself in self bias circuit. The self bias action can be explained as follows If Ic tends to increases due to increase in Ico (due to increase in temperature) the current through Re also increases. As a result voltage drop across Re also increases, hence base to emitter voltage decreases and base current decreases. Hence Ic increases less due to the action of self biasing resistor Re.

3.VOLTAGE BIAS CIRCUITS-

Image result for voltage divider bjt — (Voltage divider of BJT)

Voltage divider bias is the most popular and used way to bias a transistor. It uses a few resistors to make sure that voltage is divided and distributed into the transistor at correct levels. One resistor, the emitter resistor, R E also helps provide stability against variations in β that may exist from transistor to transistor.

As like BJT we are study 3 types of circuits in FET DC bias circuits

1.FIXED BIAS CIRCUITS-

2.SELF BIAS CIRCUITS-

3.VOLTAGE DIVIDER BIAS CIRCUITS-

Image result for Voltage Divider Bias Circuit — (Voltage divider bias of FET)

module-2

bjt ac biasing

Introduction
Model:

A model is the combination of circuit elements (properly chosen) that best approximates the actual behaviour of a device under specific conditions.

Modeling:

• A set of mathematical equation which describes the dynamic behaviour of the system is called modeling.
• Also called as mathematical modeling.
• Modeling is of two types: Large signal modeling and small signal modeling.

Small signal Modeling

• For small signal modeling
– Draw the ac equivalent circuit
– Insert the transistor model into the ac equivalent circuit.
Transistor Model:
There are two types of transistor model:

re transistor model
Hybrid model

AC Equivalent Circuit

• Setting all the DC sources to zero and replacing by short-circuit equivalent.
• Replacing all capacitors by a short-circuit equivalent.
• Removing all elements bypassed by the short circuit equivalent.
• Redrawing the network in a more convenient and logical form.

re Transistor Model

• The re model employs a diode and controlled current source to duplicate the behaviour of a transistor in the operating region.
• The subscript e of re indicates that it is the dc level of emitter current that determines the ac level of the resistance of the diode.
• BJT transistor amplifiers are referred as current controlled source.

We will discuss the small signal analysis of the following configurations:

CE Fixed-Bias configuration
CE Voltage-Divider bias configuration
CE Emitter-Bias Configuration
Emitter-Follower Configuration
Common-Base Configuration
Collector Feedback Configuration

1.fixed bias configuration-

2. SELF BIAS CONFIGURATION-

3. voltage divider bias-

4. emitter follower circuits-

5.collector feedback circuits-

6.common base configuration

Hybrid-Equivalent Model

• The re model of a transistor is sensitive to the DC level of operation of the amplifier. So the input resistance will vary with the dc operating point.
• But for hybrid equivalent model, the parameters are defined at an operating point which may or may not reflect the actual operating conditions of the amplifier.
• The parameter relating 4 variable are called h-parameters.
• The term “hybrid” because mixture of variables V & I in each eq n results in a hybrid set of units of measurement for the h parameters.

common base hybrid model

common emitter hybrid model

module-3

fet ac biasing

introduction

• FET amplifiers provide an excellent voltage gain and high input impedance.
• FETs are low-power consumption configuration with good frequency range and minimal size and weight.
• Both the JFET and D-MOSFET are used to design amplifiers having similar voltage gains.
• D-MOSFET has higher input impedance than JFET.
• A BJT device controls a large output (collector) current by a small input (base) current but the FET device controls the output (drain) current by means of small input (Gate-to-Source voltage).
• Therefore BJT is a current controlled device and FET is a voltage controlled device.
• The ac equivalent model of FET is simpler than BJT because of high input impedance characteristics of FET.

• BJT has an amplification factor β but the FET has transconductance gm.
• The FET can be used as a linear device or as a digital device in digital circuits.
• The E-MOSFET is quite popular in digital circuit especially in CMOS circuit that requires very low power consumption.
• FET devices are also widely used in high frequency applications and buffering (interfacing) applications.
• The common-source configuration is most popular provides an inverted amplified signal.
• The common-drain (source-follower) circuits provides unity gain with no inversion.
• The common-gate circuit provides gain with no inversion

• In the ac analysis of JFET, we have to determine the ac parameters:
 Input and output impedance
 Voltage and current gain.
• Due to high input impedance, the input current gradually assumed to be 0 μA. So the current gain is an undefined quantity.
• The voltage gain of an FET amplifier is less than the BJT amplifier but provides a much higher input impedance than the BJT configuration.

Fet small signal analysis

• The ac analysis of an FET configuration requires that a smallsignal ac model for the FET be developed.
• The gate-to-source voltage controls the level of drain to source (Channel) current.
• The dc gate-to-source voltage controlled the level of dc drain current through a relationship known as Shockley’s equation:

• The change in drain current that will result from a change in gate-to-source voltage can be determined using the transconductance factor gm

mathematical derivation of gm

• If we therefore take the derivative of ID with respect to VGS using Shockley’s equation, an equation for gm can be derived as follows:

fet input impedance

• The input impedance of all commercial FETs is sufficiently large to assume that input terminals approximate an open circuit.
• For a JFET, a practical value is 109 Ω.
• For a MOSFET, a practical value is 1012 Ω to 1015 Ω.

fet output impedance

• yos: Component of an admittance equivalent circuit.
• The output impedance is defined as the slope of the horizontal characteristic curve at the Q-point.
• The more horizontal the curve, the greater the output impedance

fet ac equivalent circuit

• The input impedance is represented by the open circuit at the input terminals and the output impedance by the resistor rd from drain to source. Note that the gate to source voltage is now represented by Vgs (lower-case subscripts) to distinguish it from dc levels.
• Source is common to both input and output circuits while the gate and drain terminals are only in “touch” through the controlled current source gmVgs.

In situations where rd is ignored (assumed sufficiently) large to other elements of the network to be approximated by an open circuit), the equivalent circuit is simply a current source whose magnitude is controlled by the signal Vgs and parameter gm—clearly a voltage-controlled device.

fet fixed bias circuit

• The Fixed-bias configuration includes coupling capacitors C1 and C2 that isolates the dc biasing arrangement from applied signal and load, they act as short-circuit equivalent for the ac analysis.

• Once the level of the gm & rd are determined from the dc biasing arrangement, the ac equivalent model can be substituted between appropriate terminals and dc batteries VGG & VDD are set to zero volts by a short-circuit equivalent.

Input Impedance (Zi):

Output Impedance (Z0):
Set Vi=0 V
Vgs=0 V
so gmVgs= 0 mA (replaced by an open-circuit equivalent)
The output impedance is given by

Voltage Gain (AV):

fet self bias configuration

Bypassed RS:
• The fixed-bias configuration has the distinct disadvantage
of requiring two dc voltage sources.
• The self-bias configuration requires only one dc supply to
establish the desired operating point.